Fet Amp

Posted : admin On 1/3/2022
Generalised FET as an amplifier

A FET amplifier is an amplifier that uses one or more field-effect transistors (FETs). The most common type of FET amplifier is the MOSFET amplifier, which uses metal–oxide–semiconductor FETs (MOSFETs). The main advantage of a FET used for amplification is that it has very high input impedance and low output impedance.

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In detail[edit]

The transconductance is given by

gm=IDVGS{displaystyle g_{m}={I_{mathrm {D} } over V_{mathrm {GS} }}}

On rearranging, we get

ID=gmVGS{displaystyle I_{mathrm {D} }=g_{m}V_{mathrm {GS} }}

Equivalent circuit[edit]

The internal resistance Rgs, between gate and source appears between drain and source. Rds is internal resistance between drain and source.As Rgs is very high, it is taken to be infinite and Rds is neglected.[1]

Voltage gain[edit]

For ideal FET equivalent circuit, voltage gain is given by,

From the equivalent circuit,

and from the definition of transconductance,

we get

Types of FET amplifiers[edit]

There are three types of FET amplifiers: which terminal is the common input and output? (This is similar to a bipolar junction transistor (BJT) amplifier.)

Common gate amplifier[edit]

Fet amp

The gate is common to both input and output.

Common source amplifier[edit]


The source is common to both input and output.

Common drain amplifier[edit]

The drain is common to both input and output. It is also known as a 'source follower'.[2]


The basic principle of the field-effect transistor (FET) amplifier was first proposed by Austro-Hungarian physicist Julius Edgar Lilienfeld in 1925.[3] However, his early FET concept was not a practical design.[4] The FET concept was later also theorized by Oskar Heil in the 1930s and William Shockley in the 1940s,[5] but there was no working practical FET built at the time.[4]

MOSFET amplifier[edit]

A breakthrough came with the work of Egyptian engineer Mohamed M. Atalla in the late 1950s.[6] He developed the method of surface passivation, which later became critical to the semiconductor industry as it made possible the mass-production of siliconsemiconductor technology, such as integrated circuit (IC) chips.[7][4][8] For the surface passivation process, he developed the method of thermal oxidation, which was a breakthrough in silicon semiconductor technology.[9] The surface passivation method was presented by Atalla in 1957.[10] Building on the surface passivation method, Atalla developed the metal–oxide–semiconductor (MOS) process,[7] with the use of thermally oxidized silicon.[11][12] He proposed that the MOS process could be used to build the first working silicon FET, which he began working on building with the help of Korean recruit Dawon Kahng.[7]


The MOS field-effect transistor (MOSFET) amplifier was invented by Mohamed Atalla and Dawon Kahng in 1959.[5] They fabricated the device in November 1959,[13] and presented it as the 'silicon–silicon dioxide field induced surface device' in early 1960,[14] at the Solid-State Device Conference held at Carnegie Mellon University.[15] The device is covered by two patents, each filed separately by Atalla and Kahng in March 1960.[16][17]

See also[edit]


  1. ^ abThomas L. Floyd (2011). Electronic Devices. Dorling Kinersley (India) Pvt. Ltd., licensees of Pearson Education in South Asia. p. 252. ISBN978-81-7758-643-5.
  2. ^Allen Mottershead (2003). Electronic Devices and circuits. Prentice-Hall of India, New Delhi-110001. ISBN81-203-0124-2.
  3. ^Lilienfeld, Julius Edgar (1926-10-08) 'Method and apparatus for controlling electric currents' U.S. Patent 1745175A
  4. ^ abc'Dawon Kahng'. National Inventors Hall of Fame. Retrieved 27 June 2019.CS1 maint: discouraged parameter (link)
  5. ^ ab'1960: Metal Oxide Semiconductor (MOS) Transistor Demonstrated'. The Silicon Engine: A Timeline of Semiconductors in Computers. Computer History Museum. Retrieved August 31, 2019.CS1 maint: discouraged parameter (link)
  6. ^Puers, Robert; Baldi, Livio; Voorde, Marcel Van de; Nooten, Sebastiaan E. van (2017). Nanoelectronics: Materials, Devices, Applications, 2 Volumes. John Wiley & Sons. p. 14. ISBN9783527340538.
  7. ^ abc'Martin (John) M. Atalla'. National Inventors Hall of Fame. 2009. Retrieved 21 June 2013.CS1 maint: discouraged parameter (link)
  8. ^Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. pp. 321–3. ISBN9783540342588.
  9. ^Huff, Howard (2005). High Dielectric Constant Materials: VLSI MOSFET Applications. Springer Science & Business Media. p. 34. ISBN9783540210818.
  10. ^Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. p. 120. ISBN9783540342588.
  11. ^Deal, Bruce E. (1998). 'Highlights Of Silicon Thermal Oxidation Technology'. Silicon materials science and technology. The Electrochemical Society. p. 183. ISBN9781566771931.
  12. ^U.S. Patent 2,953,486
  13. ^Bassett, Ross Knox (2007). To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology. Johns Hopkins University Press. p. 22. ISBN9780801886393.
  14. ^Atalla, M.; Kahng, D. (1960). 'Silicon–silicon dioxide field induced surface devices'. IRE-AIEE Solid State Device Research Conference. Carnegie Mellon University Press.
  15. ^'Oral-History: Goldey, Hittinger and Tanenbaum'. Institute of Electrical and Electronics Engineers. 25 September 2008. Retrieved 22 August 2019.CS1 maint: discouraged parameter (link)
  16. ^U.S. Patent 3,206,670 (1960)
  17. ^U.S. Patent 3,102,230 (1960)
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Fet amplifier designTransconductance
The ability of a JFET to amplify is described as trans-conductance and is merely the change in drain current divided by the change in gate voltage. It is indicated as Mhos or Siemens and is typically 2.5mmhos to 7.5mmhos for the MPF102 transistor. Because of the high input impedance, the gate is considered an open circuit and draws no power from the source. Although voltage gain appears low in a JFET, power gain is almost infinite.
Drain Characteristics
Even though no voltage appears at the gate, a substantial amount of current will flow from the drain to the source. In fact, the JFET does not actually turn off until the gate goes several volts negative. This zero gate voltage current through the drain to the source is how the bias is set in the JFET. Resistor R3, which is listed in the above diagram, merely sets the input impedance and insures zero volts appears across the gate with no signal. Resistor R3 does almost nothing for the actual biasing voltages of the circuit. When the gate voltage goes positive, drain current will increase until the minimum drain to source resistance is obtained and is indicated below:

Minimum Rds(on) or On State Resistance

Fet Amplifier Circuit

The above value can be determined by reading specification sheets for the selected transistor. In cases where it is not known, it is safe to assume it is zero. The other important characteristic is the absolute maximum drain current. Listed below are absolute maximum drain currents for some common N-channel transistors:

Fet Amp Images

  • MPF102 - 20ma
  • 2N3819 - 22ma
  • 2N4416 - 15ma

Fet Amplifier Design

When designing a JFET circuit, it is highly recommended to prevent the absolute maximum current from being exceeded under any conditions. In design calculations. never use more than 75% of the maximum drain current as specified by the manufacturer.
JFET Design Example 1
For the first design example, we will use an MPF102 transistor with a Vcc of 12 volts. We will allow no more than 5 ma of drain current under any circumstances. For resistor R3, the gate resistor, we will use 1 Meg for a very high impedance across the gate. The gate resistor is normally anywhere from 1 Meg to 100K. The higher values allow the JFET to amplify very weak signals but require measures to prevent oscillations. The lower values enhance stability but tend to decrease gain. Sometimes the value of this resistor needs to be adjusted for impedance matching depending on the type of signal source involved. Because we will only allow 5 ma of current through the drain to source, we will calculate the total resistance for resistors R1 and R2. We will assume the Minimum R
ds(on) to be zero.
cc = 12
Minimum R
ds(on) = 0
ds = 5 ma
cc - (Minimum Rds(on) * Ids)) / Ids = Total Resistance of R1 and R2
(12 - (0 * .005) ) / .005 = 2400 ohms

To calculate R2, we must select the desired voltage drop across this resistor. it is normally set between 20 to 30% of Vcc. For this example we will set R2 to 25% of the supply voltage (minus any voltage dropped across the drain and source) as follows:
R2 = .25 * Total Resistance of R1 and R2
R2 = .25 * 2400 = 600 ohms (nearest standard value is 560 ohms)
R2 = 560 ohms
R1 can now be easily calculated by subtracting R2 from the total resistance as follows: