Kp Mosfet

Posted : admin On 1/2/2022

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KP (BET, BETA) A/V2 intrinsic transconductance parameter. If KP is not specified and UO and TOX are entered, the parameter is computed from: KP = UO ⋅ COX The default=2.0718e-5 (NMOS), 8.632e-6 (PMOS). LAMBDA (LAM, LA) V-1 0.0 channel-length modulation TOX m 1e-7 gate oxide thickness UO cm2/ (V⋅s) carrier mobility. The equation: I d = K 2 (V g s − V t) 2 where K = μ C o x W L describes the relation between I d and V g s when K and V t are known and when the MOSFET operates in saturation mode.

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Mosfet Kp To Lambda

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LEVEL1_Model (MOSFET Level-1 Model)

Symbol
Available in ADS and RFDE

Supported via model include file in RFDE

Parameters


Model parameters must be specified in SI units.

NameDescriptionUnitsDefault
NMOS Model type: yes or no None yes
PMOS Model type: yes or no None no
Idsmod IDS model: 1=LEVEL1 2=LEVEL2 3=LEVEL3 4=BSIM1 5=BSIM2 6=NMOD 8=BSIM3 None 1
Capmod capacitance model selector: 0=NO CAP 1=CMEYER/WARD 2=SMOOTH 3=QMEYER None 1
Vto zero-bias threshold voltage V 0.0
Kp transconductance coefficient A/V22.0e-5
Gamma bulk threshold V(1/2)0.0
Phi surface potential V 0.6
Lambda channel-length modulation 1/V 0.0
Rd Drain Resistance Ohm fixed at 0.0
Rs Source Resistance Ohm fixed at 0.0
Cbd Bulk-Drain Zero-bias Junction Capacitance F 0.0
Cbs Bulk-Source Zero-bias zero-bias Junction Capacitance F 0.0
Is Gate Saturation Current A 1.0e-14
Pb bulk junction potential V 0.8
Cgso gate-source overlap capacitance per meter of channel width F/m 0.0
Cgdo gate-drain overlap capacitance per meter of channel width F/m 0.0
Cgbo gate-bulk overlap capacitance per meter of channel length F/m 0.0
Rsh drain and source diffusion sheet resistance Ohm/sq 0.0
Cj zero-bias bulk junction bottom capacitance per square meter of junction area F/m20.0
Mj bulk junction bottom grading coefficient None 0.5
Cjsw zero-bias bulk junction periphery capacitance per meter of junction perimeter F/m 0.0
Mjsw bulk junction periphery grading coefficient None 1/3
Js bulk junction saturation current per square meter of junction area A/m20.0
Tox oxide thickness m 1.0e-7
Nsub substrate (bulk) doping density cm-30.0
Nss surface state density cm-20.0
Tpg Type of Gate Material: 1=opposite to bulk, 1=same as bulk, 0=aluminum None 1
Ld lateral diffusion length m 0.0
Uo surface mobility cm2 /(Vs) 600.0
Nlev noise model level None -1
Gdsnoi drain noise parameters for Nlev=3 None 1
Kf flicker-noise coefficient None 0.0
Af flicker-noise exponent None 1.0
Fc bulk junction forward-bias depletion capacitance coefficient None 0.5
Rg gate resistance Ohm fixed at 0.0
Rds drain-source shunt resistance Ohm fixed at infinity ††
Tnom Nominal ambient temperature °C 25
Trise temperature rise above ambient °C 0
N bulk P-N emission coefficient None 1.0
Tt bulk P-N transit time 0.0
Ffe (Ef) flicker noise frequency exponent None 1.0
Imax explosion current A 10.0
Imelt explosion current similar to Imax; defaults to Imax (refer to Note 10) A defaults to Imax
wVsubfwd substrate junction forward bias (warning) V None
wBvsub substrate junction reverse breakdown voltage (warning) V None
wBvg gate oxide breakdown voltage (warning) V None
wBvds drain-source breakdown voltage (warning) V None
wIdsmax maximum drain-source current (warning) A None
wPmax maximum power dissipation (warning) W None
Acm area calculation method None 0
Hdif length of heavily doped diffusion (Acm=2, 3 only) m 0.0
Ldif length of lightly doped diffusion adjacent to gate (Acm=1, 2 only) m 0.0
Wmlt width diffusion layer shrink reduction factor None 1.0
Lmlt Gate length shrink factor None 1.0
Xw accounts for masking and etching effects m 0.0
Rdc additional drain resistance due to contact resistance Ohm 0.0
Rsc additional source resistance due to contact resistance Ohm 0.0
Wmin Binning minimum width (parsed but not used, use BinModel) m 0.0
Wmax Binning maximum width (parsed but not used, use BinModel) m 1.0
Lmin Binning minimum length (parsed but not used, use BinModel) m 0.0
Lmax Binning maximum length (parsed but not used, use BinModel) m 1.0
AllParams Data Access Component (DAC) Based Parameters None None
Parameter value varies with temperature based on model Tnom and device Temp. †† Value of 0.0 is interpreted as infinity.
Netlist Format

Model statements for the ADS circuit simulator may be stored in an external file. This is typically done with foundry model kits. For more information on how to set up and use foundry model kits, refer to Design Kit Development.

model modelname MOSFET Idsmod=1 [parm=value]*

The model statement starts with the required keyword model. It is followed by the modelname that will be used by mosfet components to refer to the model. The third parameter indicates the type of model; for this model it is MOSFET. Idsmod=1 is a required parameter that is used to tell the simulator to use the Spice level 1 equations. Use either parameter NMOS=yes or PMOS=yes to set the transistor type. The rest of the model contains pairs of model parameters and values, separated by an equal sign. The name of the model parameter must appear exactly as shown in the parameters table-these names are case sensitive. Some model parameters have aliases, which are listed in parentheses after the main parameter name; these are parameter names that can be used instead of the primary parameter name. Model parameters may appear in any order in the model statement. Model parameters that are not specified take the default value indicated in the parameters table. For more information about the ADS circuit simulator netlist format, including scale factors, subcircuits, variables and equations, refer to 'ADS Simulator Input Syntax' in Using Circuit Simulators.

Example:

Notes/Equations

Kp Mosfet Test

Note

For RFDE Users Information about this model must be provided in a model file; refer to Netlist Format.

  1. The simulator provides three MOSFET device models that differ in formulation of I-V characteristics. MOSFET Level1_Model is Shichman-Hodges model derived from [1].
  2. Vto, Kp, Gamma, Phi, and Lambda determine the DC characteristics of a MOSFET device. ADS will calculate these parameters (except Lambda) if instead of specifying them, you specify the process parameters Tox, Uo, Nsub, and Nss.
  3. Vto is positive (negative) for enhancement mode and negative (positive) for depletion mode N-channel (P-channel) devices.
  4. P-N junctions between the bulk and the drain and the bulk and the source are modeled by parasitic diodes. Each bottom junction is modeled by a diode and each periphery junction is modeled by a depletion capacitance.
  5. Diode parameters for the bottom junctions can be specified as absolute values (Is, Cbd and Cbs) or as per unit junction area values (Js and Cj).
    If Cbd = 0.0 and Cbs = 0.0, then Cbd and Cbs will be calculated:

    Cbd = Cj Ad, Cbs = Cj As

    If Js > 0.0 and Ad > 0.0 and As > 0.0, then Is for drain and source will be calculated:

    Is(drain) = Js Ad, Is(source) = Js As

  6. Drain and source ohmic resistances can be specified as absolute values (Rd, Rs) or as per unit square value (Rsh).
    If Nrd 0.0 or Nrs 0.0, Rd and Rs will be calculated:
    Rd = Rsh Nrd, Rs = Rsh Nrs
  7. Charge storage in the MOSFET consists of capacitances associated with parasitics and intrinsic device.
    Parasitic capacitances consist of three constant overlap capacitances (Cgdo, Cgso, Cgbo) and the depletion layer capacitances for both substrate junctions (divided into bottom and periphery), that vary as Mj and Mjsw power of junction voltage, respectively, and are determined by the parameters Cbd, Cbs, Cj, Cjsw, Mj, Mjsw, Pb and Fc.
    The intrinsic capacitances consist of the nonlinear thin-oxide capacitance, which is distributed among the gate, drain, source, and bulk regions.
  8. Charge storage is modeled by fixed and nonlinear gate and junction capacitances. MOS gate capacitances, as a nonlinear function of terminal voltages, are modeled by Meyer's piece-wise linear model for levels 1, 2, and 3. The Ward charge conservation model is also available for levels 2 and 3, by specifying the XQC parameter to a value smaller than or equal to 0.5. For Level 1, the model parameter TOX must be specified to invoke the Meyer model when Capmod is equal to 1 (default value). If Capmod = 0, no gate capacitances will be calculated. If Capmod = 2, a smooth version of the Meyer model is used. If Capmod =3, the charge conserving first-order MOS charge model [2] that was used in Libra is used.
  9. To include the thin-oxide charge storage effect, model parameter Tox must
    be > 0.0.
  10. Imax and Imelt Parameters
    Imax and Imelt specify the P-N junction explosion current. Imax and Imelt can be specified in the device model or in the Options component; the device model value takes precedence over the Options value.
    If the Imelt value is less than the Imax value, the Imelt value is increased to the Imax value.
    If Imelt is specified (in the model or in Options) junction explosion current = Imelt; otherwise, if Imax is specified (in the model or in Options) junction explosion current = Imax; otherwise, junction explosion current = model Imelt default value (which is the same as the model Imax default value).
  11. Use AllParams with a DataAccessComponent to specify file-based parameters (refer to 'DataAccessComponent' in Introduction to Circuit Components). Note that model parameters that are explicitly specified take precedence over those specified via AllParams. Set AllParams to the DataAccessComponent instance name.
Temperature Scaling

The model specifies Tnom, the nominal temperature at which the model parameters were calculated or extracted. To simulate the device at temperatures other than Tnom, several model parameters must be scaled with temperature. The temperature at which the device is simulated is specified by the device item Temp parameter. (Temperatures in the following equations are in Kelvin.)
The depletion capacitances Cbd, Cbs, Cj, and Cjsw vary as:

Ltspice Mosfet Kp


where γ is a function of the junction potential and the energy gap variation with temperature.

The surface potential Phi and the bulk junction potential Pb vary as:


The transconductance Kp and mobility Uo vary as:


The source and drain to substrate leakage currents Is and Js vary as:


where EG is the silicon bandgap energy as a function of temperature.
The MOSFET threshold voltage variation with temperature is given by:

Noise Model

Thermal noise generated by resistor Rg, Rs, Rd, and Rds is characterized by the following spectral density:

Channel and flicker noise (Kf, Af, Ffe) generated by DC transconductance gm and current flow from drain to source is characterized by spectral density:

In the preceding expressions, k is Boltzmann's constant, T is operating temperature in Kelvin, q is electron charge, kf , a f, and f fe are model parameters, f is simulation frequency, and Δ f is noise bandwidth.

References
  1. H. Shichman and D. A. Hodges. 'Modeling and simulation of insulated-gate field-effect transistor switching circuits,' IEEE Journal of Solid-State Circuits, SC-3, 285, Sept. 1968.
  2. Karen A. Sakallah, Yao-tsung Yen, and Steve S. Greenberg. 'The Meyer Model Revisited: Explaining and Correcting the Charge Non-Conservation Problem,' ICCAD , 1987.
  3. P. Antognetti and G. Massobrio. Semiconductor device modeling with SPICE , New York: McGraw-Hill, Second Edition 1993.
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